1. Field of the Invention
The invention relates to a burst demodulator, and more particularly to a burst demodulator in a TDMA (Time Division Multiplex Access) system which sharply and stably provides a signal recognizing a first and a last position of a burst modulated input signal to a receiver side.
2. Description of the Prior Art
A demodulator is required to detect a first and a last position of a received signal when demodulating burst signals divided into time slots such as in TDMA. Generally, the signal representing the first and the last position of each of the burst signals (hereinafter referred to as "the frame signal") can be obtained by inputting a receive signal strength indicator (hereinafter referred to as "the RSSI") and a suitable threshold value to a comparator, and then causing the comparator to compare them.
FIG. 7 shows a block diagram of a conventional burst demodulator. The block diagram shown in FIG. 7 is comprised of a logarithm amplifier 1 for outputting a power level of a modulated input signal S1 as a logarithm value, an integrator 2 for receiving and smoothing an output of the logarithm amplifier 1 and outputting the smoothed output as the RSSI, a comparator 3 for receiving the RSSI from the integrator 2, comparing the RSSI with a previously set appropriate reference value REF, and outputting the frame signal, a demodulator 4 for receiving the modulated input signal and an output of the comparator 3, and performing a demodulating operation, and a unique word detector 5 for receiving demodulated data S2 produced by the demodulator 4 and a demodulated clock CK1 which is in synchronization with the demodulated data S2, detecting a unique word (hereinafter referred to as "the UW"), and outputting output data S3 obtained by removing a preamble and the UW from the demodulated data S2, and the output clock CK2 which is in synchronization with the output data S3.
As noted above the comparator 3 compares the RSSI with the appropriate reference value REF while including some margin within the noise level. The comparator 3 thereafter outputs the frame signal of a `LO` (low) state when the RSSI is lower than the REF, that is, during the non-signal zone, and of a `HI` (high) state when the RSSI is higher than the REF, that is, during the signal zone.
FIG. 8 shows a time slot configuration of a general burst modulated input signal s1. The time slot is comprised of a PR (preamble) portion including a fixed pattern for recovering carriers and clocks, the UW portion, and a DATA portion including information data.
The demodulator 4, which remains in a reset state when the frame signal is in the `LO` state, recovers the clocks and the carriers by using the PR simultaneously when the frame signal becomes the `HI` state. And the demodulator 4 outputs the demodulated data S2 of the base band signal and the demodulated clock CK1 which is synchronized with the demodulated data S2.
The UW detector 5, which remains in a reset state when the frame signal is in the `LO` state, starts the UW detecting operation simultaneously when the frame signal becomes the `HI` state. And the UW detector 5 outputs, when detecting the UW, the output data S3 obtained by removing the PR and the UW from the demodulated data and the output clock CK2 which is synchronized with the output data S3.
The above operation enables the input signal to be detected, thereby providing a demodulating operation.
The RSSI is determined by the output signal of the logarithm amplifier 1. The output of the logarithm amplifier 1 is in turn a signal obtained by full-wave rectification of the modulated input signal. Therefore, it is affected by the carrier signal and the clock frequency. As the carrier signal is a high frequency signal, it can be deleted by inputting the output of the logarithm amplifier 1 to a simple integrator 2.
FIG. 9 shows an example of the symbol arrangement on a phase plane in a case where the modulating system is a QPSK (quadrature phase shift keying) type, in which the dotted lines represent the loci on which the symbol is moved. In a case where the symbol is moved between the positions which are line-symmetrical with respect to each of an I and a Q-axis, such as between (1, 1) and (0, 1), an amplitude of the modulated input signal (the distance from an origin to a signal point) does not change largely. On the other hand, in a case where the symbol is moved between the positions which are point-symmetrical with respect to the origin, the amplitude becomes remarkably small, as is apparent from the loci of FIG. 9.
FIG. 10 illustrates the relation between the RSSI and the reference value REF and the comparator output COMP. The depicted RSSI corresponds to a case where a modulated input signal comprising six symbols from the first symbol to the last symbol is inputted. According to the above description, the change from the fourth symbol to the fifth one does not greatly change the RSSI, which shows that the change is line-symmetrical with respect to the I (in-phase) or the Q (quadrature-phase) axis. The other changes cause the RSSI to drop largely, which shows that the changes are point-symmetrical with respect to the origin.
When the reference value REF is set as shown in FIG. 10 while including some margin within the noise level, the frame signal (comparator output) can be stably output, albeit with difficulty, from the first to the last position thereof.
On the contrary, in a case where the RSSI, as shown in FIG. 11, is smaller than that shown in FIG. 10, the frame signal flutters unpredictably at an intermediate portion of the essential time slot. Inputting the above RSSI to the comparator causes the frame signal to flutter unpredictably at the intermediate portion of the time slot. Usually, the demodulator 4 is, in order to reconstruct the clocks and the carriers stably and at high speed, adapted to be reset in operation so as to disable the clocks and the carriers to be recovered by using the data except the PR when the frame signal is in the `LO` state. Moreover, the UW detector 5 is, in order to prevent the false detection rate from increasing by the UW detector 5 operating when not receiving the signal, adapted to be reset in operation when the frame signal is in the `LO` state. Therefore, the frame signal fluttering at the intermediate portion of the time slot disrupts the stable demodulating operation.
There are two methods for preventing the frame signal from fluttering in the conventional construction. The first one is to increase the input level to the logarithm amplifier 1 so as to prevent the RSSI from becoming lower than the state shown in FIG. 10, which requires increasing the transmission level or increasing the gain in the receiver side. In either case, these approaches are limited due to distortion, electric power consumption, or other problems. Moreover, this method cannot solve such a problem that the signal of low input level cannot be stably detected, which causes the further problem that the first method ultimately unduly narrows the dynamic range of the input signal.
Moreover, the second approach is to increase the time constant of the integrator 2 and then smooth the waveform of the RSSI. FIG. 12 is a view showing a thus-smoothed RSSI and the comparator output COMP. FIG. 12 shows the data for several tens and several hundreds of symbols, but does not show data for only several symbols, as shown in FIGS. 10 and 11.
Therefore, smoothing to this degree by simple integration allows the comparator output to be retarded by not less than several tens of symbols with respect to the first portion of the actual signal, which requires an extended guard time (non-signal period between the time slots) and preamble, which lower the transmission efficiency.